1. Field of the Invention
This invention relates to improvements in ball grid array BGA packages for integrated circuits.
2. Prior Art
FIGS. 1 and 2 illustrate a conventional die-down high performance ball grid array HBGA package 10, which includes a die-carrier/heat spreader 12 which is formed of a metallic or ceramic material. The die-carrier/heat spreader 12 has a die-cavity 14 formed through its lower surface. An integrated-circuit die 16 is attached to the top interior surface 18 of the die-carrier/heat spreader 12. A plurality of bonding wires are connected between wire bonding pad on the integrated-circuit die 16 and wire bonding sites formed on an insulated tape layer which surrounds the die-cavity 16. The wire-bonding sites on the tape layer are located outside of the cavity and adjacent to the cavity on the bottom side of the die-carrier/heat spreader 12.
An encapsulation cap 20 covers the integrated-circuit die 16 and the bonding wires. A number of solder balls, typically shown as 22, are arranged in a well-known grid pattern and are attached to the conductive traces formed on the insulated tape layer. The solder balls 22 are also connected to a number of corresponding solder-ball attachment sites located on the top surface of a printedcircuit board 24.
A number of conductive traces are formed on the insulated tape layer to connect the conductive bonding sites to selective solderable areas for the solder balls 22. The selective solderable areas are located on the insulated tape outside of the cavity and away from the encapsulation cap. The selective solderable areas for the solder balls are formed on the insulated tape layer and are arranged in a grid pattern on the bottom side of the die-down HBGA package. A solder mask is formed on the insulated tape layer but not over the selective solderable areas for the solder balls 22 on the insulated tape.
Note that thickness of the encapsulation cap 20 must be sufficiently thin and the solder balls 22 sufficiently large, so that the bottom surface of the encapsulation cap 20 provides sufficient clearance to the top surface of the printed-circuit board 24.
With reference to FIG. 2 in greater detail, the bonding wires, typically shown as 30, have one of their ends attached to bonding pads, typically shown as 32, on the lower surface of the integrated-circuit die 16. The other ends the bonding wires are attached to wire-bonding sites, typically shown as 34, which are formed on an insulated tape layer 24. The insulated tape layer 24 is attached with an adhesive layer 36 to a lower surface 38 of the die-carrier/heat spreader 12.
The encapsulation material, which forms the encapsulation cap 20, fills the cavity 14 and covers the integrated-circuit die 16, the bonding wires 30, and the wire-bonding sites 34, as illustrated. As illustrated in FIG. 2, the bonding wires 30 droop below the plane of the lower surface of the insulated tape layer 24. The encapsulation cap 20 must be thick enough to cover the drooping wire loops of the bonding wires 30 while still providing sufficient clearance to the top surface of the printed-circuit board 24.
In order to mount an HBGA package to the surface of a printed-circuit board, the grid pattern of the solder balls is placed over a corresponding grid pattern of solderable areas on the printed-circuit board. The solder balls are then heated to a temperature sufficient to melt the solder balls and to fix the HBGA package to the surface of the printed-circuit board. The solder balls provide mechanical and electrical connection between the HBGA package and the printed-circuit board.
The bonding wires 30 form wire loops. The wire loops extend between the bonding-wire pads on the integrated-circuit die, which are located in the cavity, to the bonding sites on the tape layer, which are located outside of the cavity. The bonding-wire loops also extend downwardly below the plane of the insulated tape layer on the bottom side of the die-carrier/heat sink. On the one hand, the encapsulation cap 20 must be sufficiently thick so that it completely encapsulates the downwardly extending bonding-wire loops. On the other hand, the encapsulation cap 20 must also be sufficiently thin so that sufficient clearance is provided between its bottom surface and the component-mounting surface of the printed-circuit board when the HBGA package is soldered to the printed-circuit board with the solder balls 22.
A high performance ball grid array HBGA package has a grid with a center-to-center spacing, or pitch, between adjacent solder balls of 50 mils for solder balls with a final, assembled thickness of 19 mils. A solder ball with an initial diameter of 30 mils collapses to 24-25 mils when it is mounted to a package. When the package is finally assembled to a printed-circuit board, the solder ball will have a final thickness of 19 mils. The depth of the cavity 14 in the die-carrier/heat spreader 12 is 18 mils and the combined thickness of the adhesive layer 36 and the insulated tape layer 24 is 6 mils. The droop of the bonding wires loops below the plane of the lower surface of the insulated tape layer 24 is 10 mils. The distance w between the lowest point of a bonding wire and the lower surface of the encapsulation cap is 4 mils. For a solder ball having a thickness of 19 mils, the spacing d between the lower surface of the encapsulation cap 20 and the top surface of the printed-circuit board 24 is 5 mils to provide clearance between the HBGA package and the surface of the printed-circuit board.
HBGA packages having solder-ball grid spacings smaller than 50 mils require using solder ball with final thicknesses less than 19 mils. Consequently the package configuration illustrated in FIG. 1 and FIG. 2 is limited to larger solder balls and larger grid spacings.
Consequently, it can be appreciated that the design of a die-down HBGA package requires attention to the dimensions and allowable tolerances for certain critical parameters, such as the droop of the wire loops and the thickness of the encapsulation cap. This is especially important for higher density cavity-down BGA packages with a solder-ball spacing, or pitch, which is less than 50 mils or 1.27 mm. pitches. As the diameter of the solder balls get smaller, the clearance between the package and the surface of the motherboard also get smaller.
Further, it can be appreciated that fabrication of the cavity in the die-attach/heat spreader by etching or by stamping adds additional fabrication costs and complexity to a package design.
The insulated tape layer of a conventional die-down BGA package are good for routing of conductive traces but are limited when solder ball pads are to be attached to the tapes because the conductive traces have to go around the pads which interfere with routing of the conductive traces on the insulated tape layer.